The Challenge

A patent litigation law firm powerhouse representing one of the world’s largest semiconductor companies required comprehensive invalidity searches for two asserted patents in a high-stakes multi-patent dispute.

The patents describe technology for keeping data synchronized across multiple processor cores that each maintain their own local memory cache, working as the “traffic control” system ensuring every core is working with current, accurate information rather than outdated copies.

The technologies covered:

• Speculative probing  
• Distributed cache coherence controllers 
• Ring and point-to-point interconnects 
• Message sequencing 

The client required litigation-ready prior art capable of addressing numerous technical claim limitations, including several features rarely disclosed together within a single reference. While many conventional publications discussed similar concepts, they frequently failed to satisfy the specific architectural and protocol requirements of the asserted claims.

The Solution

An extensive search strategy was engineered specifically for advanced computer architecture and multiprocessor systems. Rather than simply identifying similar technologies, the research focused on locating references that disclosed the precise sequence of cache coherence operations required by the asserted claims. Nearly 250 technical references were carefully analyzed against detailed claim limitations.

Our approach included:

Our impact

Patent litigation involving modern processor architectures demands far more than keyword searching; it requires deep technical understanding of decades of academic and industry research. This engagement highlights the value of performing exceptionally rigorous prior art searches across highly specialized technologies to deliver litigation-ready research for sophisticated intellectual property disputes.